1. Field of the Invention
The present invention relates to a driver circuit for a semiconductor display device using thin film transistors. Particularly, the invention relates to a differential amplifying circuit and a buffer using the same, which is used for a driver circuit of an active matrix type semiconductor display device. Moreover, the invention relates to a semiconductor display device using the driver circuit.
2. Description of the Related Art
In recent years, a technique for manufacturing a thin film transistor (TFT) using a semiconductor thin film formed on an inexpensive glass substrate has been rapidly developed. The reason is that the demand for an active matrix type liquid crystal display device and an electroluminescence (EL) display device has been increased.
In the active matrix type liquid crystal display device, a TFT is disposed for each of several hundred thousands to millions of pixels arranged in matrix, and an electric charge going in and out of each pixel electrode is controlled by a switching function of the TFT.
FIG. 10 shows a structure of a conventional active matrix type liquid crystal display device. Shift registers and buffer circuits are generically called a driver circuit, and are integrally formed on the same substrate together with an active matrix circuit in recent years. Reference numeral 1001 denotes a source signal line side driver circuit, and 1002 denotes a gate signal line side driver circuit.
Reference numeral 1003 denotes an active matrix circuit, and pixel TFTs 1004 are disposed in matrix. A pixel electrode is connected to a drain electrode of each of the pixel TFTs 1004. A liquid crystal material is put between the pixel electrode and its opposite electrode and is sealed. An auxiliary capacitor 1006 for holding an electric charge is provided for each of the pixel TFTs 1004.
There is also known a structure in which quartz is used for a substrate and a thin film transistor is manufactured with a polycrystal silicon film.
There is also known a technique in which a thin film transistor using a crystalline silicon film is manufactured on a glass substrate by using a technique such as laser annealing. When this technique is used, it is possible to integrate an active matrix circuit and a driver circuit on the glass substrate.
In the structure shown in FIG. 10, a picture signal supplied to a picture signal line is selected by a timing signal from a shift register circuit of the source signal line side driver circuit. Then a designated picture signal is supplied to a corresponding source signal line. A timing signal from the gate signal line side driver circuit is supplied to a corresponding gate signal line (scanning line). The picture signal supplied to the source signal line is written in the pixel electrode of a thin film transistor of a pixel selected by the timing signal from the gate signal line.
By sequentially repeating the foregoing operation at suitable timing, information is sequentially written in the respective pixels arranged in matrix.
When picture information for one picture (one frame) is written, writing of picture information for a next picture is carried out. In this way, display of a picture is sequentially carried out. In general, writing of information for one picture is carried out 30 times or 60 times per second.
Here, an example of the source signal line side driver circuit will be shown in FIG. 11. Reference numeral 1100 denotes a clock input terminal, 1101 denotes a clock line, 1102 denotes a start pulse is input terminal, 1103 to 1105 denote shift registers, 1106 to 1111 denote inverter-type buffers, 1112 denotes a video signal input terminal, 1113 denotes a video signal line, 1114 to 1116 and 1120 to 1122 denote switches, 1117 to 1119 and 1125 to 1127 denote holding capacitors, 1123 denotes a transfer signal input terminal, 1124 denotes a transfer signal line, 1128 to 1130 denote analog buffers, and 1131 to 1133 denote source signal line connection terminals.
In the case of analog gradation, a video signal which is continuous in time series is used as a gradation signal inputted to the source signal line side driver circuit. In the case of a normally white mode (display mode in which white display is effected when a voltage is not applied to a liquid crystal), it is set such that as an absolute value of a voltage of a gradation signal becomes large, the display approaches black display. With respect to the shift registers 1103 to 1105, a start pulse synchronous with a video signal is inputted to the start pulse input terminal 1102, and is sequentially shifted by a clock pulse inputted from the clock pulse line. The output of the shift registers 1103 to 1105 is inputted into a sampling circuit through the inverter-type buffers 1106 to 1111.
The sampling circuit is constituted of the switches 1114 to 1116 and the holding capacitors 1117 to 1119. The switches 1114 to 1116 are sometimes called transmission gates. Turning On or OFF of the switches 1114 to 1116 is controlled by the buffer circuits. In the ON state, the video signal line is short-circuited to the holding capacitors 1117 to 1119, and electric charges are stored in the holding capacitors 1117 to 1119. When a start pulse is inputted and the pulse passes through the shift registers, the output of the buffer circuits is inverted, and the switches 1114 to 1116 are turned OFF.
When the switches 1114 to 1116 are turned OFF, the electric charges stored in the holding capacitors 1117 to 1119 are held, and the electric potential is held until the next time the switches 1114 to 1116 are turned ON. In a period between a time point when sampling of video data for one line is ended and a time point when sampling for the next line is started, a transfer signal is inputted from the transfer signal input terminal 1123, and this transfer signal is supplied from the transfer signal line. The switches 1120 to 1122 are turned ON by this transfer signal, electric charges are stored in the holding capacitors 1125 to 1127, and the electric potentials of the holding capacitors 1117 to 1119 are transferred to the holding capacitors 1125 to 1127. When the switches 1120 to 1122 are turned OFF, the electric potentials of the holding capacitors 1125 to 1127 are held.
The holding capacitors 1125 to 1127 are connected with the analog buffers 1128 to 1130, and the source signal lines 1131 to 1133 are driven through the analog buffers 1128 to 1130. These analog buffers 1128 to 1130 are circuits necessary for driving the source signal lines without affecting the electric potentials of the holding capacitors.
Here, an example of a conventional circuit used for the analog buffers 1128 to 1130 will be shown in FIG. 12. Reference numeral 1201 denotes a terminal to which a holding capacitor is connected, and which is an input end of a signal. Reference numeral 1202 denotes a terminal to which a source signal line is connected, and which is an output end of a signal. Reference numeral 1203 denotes a constant current source, 1204 denotes a constant voltage source, 1205 and 1206 denote P-channel TFTs, and 1207 and 1208 denote N-channel TFTs. In the analog buffer of FIG. 12, a differential circuit A is constituted of the P-channel TFTs, and a current mirror circuit B is constituted of the N-channel TFTs.
The operation of the analog buffer of FIG. 12 will be described. In the case where the electric potential of the input end 1201 of the differential circuit connected to the holding capacitor is increased, an input current of the current mirror circuit 1210 connected to a reversed-phase output of the input end 1201 is decreased, and the output current of the current mirror circuit 1210 is decreased in proportion to that. On the other hand, a current of the same phase at the input end is increased, so that the electric potential at the output end 1202 is increased and reaches the same electric potential as that at the input end of the differential circuit. Thus, the electric potential of the source signal line connected to the output end 1202 becomes the same electric potential as that of the input end.
In recent years, with rapid increase of the amount of information to be processed, enlargement in display capacity and improvement in fineness of display resolution have been intended. Here, examples of generally used display resolutions for a computer will be shown with the number of pixels and the standard name in the following.
Number of pixels (horizontalxc3x97vertical): Standard Name
640xc3x97400: EGA
640xc3x97480: VGA
800xc3x97600: SVGA
1024xc3x97768: XGA
1280xc3x971024: SXGA
In recent years, in the field of a personal computer as well, since software making a plurality of displays different from each other in character on a display screen has come into wide use, a display device has shifted to one corresponding to the XGA or SXGA standard higher in display resolution than the VGA or SVGA standard. An active matrix type liquid crystal display device is very frequently used also in the field of a personal computer, and has become popular as a display device for not only a notebook computer but also a desktop personal computer.
Moreover, the active matrix type liquid crystal display device with the high display resolution has been used for display of television signals in addition to display of data signals in a personal computer.
Such a buffer is meaningless if its current capacity is small, and a buffer having a large current capacity to a certain degree is required. In the case where a buffer having a large current capacity is formed of a thin film transistor, a TFT having a large current capacity, that is, a large channel width is required. If a size (channel width) of a TFT is simply enlarged to realize a buffer with a sufficiently large buffer, only the center portion of the TFT functions as a channel, and the side portions do not function as the channel, so that there is a case that deterioration of the TFT is accelerated.
Further, when the size of a TFT is large, self heat generation of the TFT becomes large, which may cause a change of a threshold value or deterioration to occur.
In a TFT having a large channel width, fluctuation in crystallinity occurs in a component, and as a result, fluctuation in a threshold voltage occurs among each TFT. Thus, it is inevitable that fluctuation occurs also in the characteristics of buffers each constituted of a plurality of TFTs. Thus, there exist buffers having fluctuated characteristics for each signal line, and the fluctuation in the characteristics directly causes fluctuation in applied voltages to a pixel matrix circuit.
In the case where a liquid crystal is driven with an applied voltage of 5 V, and in the case where 8-gradation display is made, a voltage range for one gradation is 5 V/8 gradations=625 mV/gradation, and similarly, the voltage range becomes 313 mV in the case where 16-gradation display is made, 156 mV in the case where 32-gradation display is made, 78 mV in the case where 64-gradation display is made, 39 mV in the case where 128-gradation display is made, and 20 mV in the case where 256-gradation display is made.
In the case where an active matrix type liquid crystal display device is applied to a three-plate type projector, it is necessary to make 256-gradation display in order to realize full color display. Thus, as described above, if fluctuation in applied voltage occurs for every source signal line, a display blur in the entire of the display device appears, and excellent display can not be made.
In the gate signal line side driver circuit as well, a scanning signal is sequentially supplied to a gate signal line (scanning line) on the basis of a timing signal from a shift register. In the gate signal line side driver circuit, all pixel TFTs for one line connected to one scanning line must be driven, and a load capacity connected to one scanning line is large. Thus, also in the gate signal line side driver circuit, there is a case where it becomes necessary to eliminate xe2x80x9cdullingxe2x80x9d by making the timing signal from the shift register pass through a buffer circuit or the like. In this case as well, a buffer having a large current capacity is necessary, so that the above described problems come to occur. Especially, the buffer of the gate signal line must drive all of the connected TFTs for one line in the pixel matrix circuit, so that the fluctuation in the characteristics of the buffer causes a remarkable picture blur. This is one of the most is serious problems when a display device with high fineness/high resolution is desired.
The present invention has been made to solve the foregoing problems, and an object thereof is to provide a buffer in which even in the case where there is a difference in characteristics of each TFT, these differences of characteristics can be canceled. Another object of the invention is to provide a driver circuit of an active matrix type semiconductor display device, which uses this buffer with little fluctuation. Still another object of the invention is to provide a semiconductor display device using this driver circuit of the invention and capable of obtaining an excellent picture without a picture blur and with high fineness/high resolution.
The structure of the present invention will be described below.
According to one aspect of the invention, a thin film transistor circuit is provided, which comprises at least: a differential circuit including x (x is a natural number not less than 2) input-side thin film transistors which have a common gate electrode potential and to which a signal is inputted, and x output-side thin film transistors which have a common gate electrode potential and from which a signal is outputted; and a current mirror circuit including y (y is a natural number not less than 2) input-side thin film transistors and y output-side thin film transistors, which have a common gate electrode potential, the gate electrodes of y input-side thin film transistors being connected to source/drain regions of y input-side thin film transistors. By this, the above-mentioned objects can be achieved.
According to another aspect of the present invention, a thin film transistor circuit is provided, which comprises at least: a differential circuit including x (x is a natural number not less than 2) input-side thin film transistors which have a common gate electrode potential and to which a signal is inputted, and (nxc3x97x) (n is a natural number not less than 2) output-side thin film transistors which have a common gate electrode potential and from which a signal is outputted; and a current mirror circuit including y (y is a natural number not less than 2) input-side thin film transistors and (nxc3x97y) output-side thin film transistors, which have a common gate electrode potential, the gate electrodes of y input-side thin film transistors being connected to source/drain regions of y input-side thin film transistors. By this, the above-mentioned objects can be achieved.
According to still another aspect of the invention, a semiconductor display device is provided, which comprises: a pixel matrix circuit; and a driver circuit comprising at least a thin film transistor circuit using at least: a differential circuit including x (x is a natural number not less than 2) input-side thin film transistors which have a common gate electrode potential and to which a signal is inputted, and x output-side thin film transistors which have a common gate electrode potential and from which a signal is outputted; and a current mirror circuit including y (y is a natural number not less than 2) input-side thin film transistors and y output-side thin film transistors, which have a common gate electrode potential, the gate electrodes of y input-side thin film transistors being connected to source/drain regions of y input-side thin film transistors, wherein the pixel matrix circuit and the driver circuit are formed on the same substrate. By this, the above-mentioned objects can be achieved.
According to still another aspect of the invention, a semiconductor display device is provided, which comprises: a pixel matrix circuit; and a driver circuit comprising at least a thin film transistor circuit using at least: a differential circuit including x (x is a natural number not less than 2) input-side thin film transistors which have a common gate electrode potential and to which a signal is inputted, and (nxc3x97x) (n is a natural number not less than 2) outputs side thin film transistors which have a common gate electrode potential and from which a signal is outputted; and a current mirror circuit including y (y is a natural number not less than 2) input-side thin film transistors and (nxc3x97y) output-side thin film transistors, which have a common gate electrode potential, the gate electrodes of y input-side thin film transistors being connected to source/drain regions of y input-side thin film transistors, wherein the pixel matrix circuit and the driver circuit are formed on the same substrate. By this, the above-mentioned objects can be achieved.